libsidplayfp 1.8.8
c64.h
1/*
2 * This file is part of libsidplayfp, a SID player engine.
3 *
4 * Copyright 2011-2014 Leandro Nini <drfiemost@users.sourceforge.net>
5 * Copyright 2007-2010 Antti Lankila
6 * Copyright 2000 Simon White
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
21 */
22
23#ifndef C64_H
24#define C64_H
25
26#include <stdint.h>
27#include <cstdio>
28
29#include <map>
30
31#include "Banks/IOBank.h"
32#include "Banks/ColorRAMBank.h"
33#include "Banks/DisconnectedBusBank.h"
34#include "Banks/SidBank.h"
35#include "Banks/ExtraSidBank.h"
36
37#include "EventScheduler.h"
38
39#include "c64/c64env.h"
40#include "c64/c64cpu.h"
41#include "c64/c64cia.h"
42#include "c64/c64vic.h"
43#include "c64/mmu.h"
44
45#ifdef HAVE_CONFIG_H
46# include "config.h"
47#endif
48
49class c64sid;
50class sidmemory;
51
52
53#ifdef PC64_TESTSUITE
54class testEnv
55{
56public:
57 virtual ~testEnv() {}
58 virtual void load(const char *) =0;
59};
60#endif
61
77class c64: private c64env
78{
79public:
80 typedef enum
81 {
82 PAL_B = 0
87
88private:
89 typedef std::map<int, ExtraSidBank*> sidBankMap_t;
90
91 class resetSID
92 {
93 public:
94 void operator() (sidBankMap_t::value_type &e) { e.second->reset(); }
95 };
96
97private:
99 double m_cpuFreq;
100
102 int irqCount;
103
105 bool oldBAState;
106
108 EventScheduler m_scheduler;
109
111 c64cpu cpu;
112
114 c64cia1 cia1;
115
117 c64cia2 cia2;
118
120 c64vic vic;
121
123 ColorRAMBank colorRAMBank;
124
126 SidBank sidBank;
127
129 sidBankMap_t extraSidBanks;
130
132 DisconnectedBusBank disconnectedBusBank;
133
135 IOBank ioBank;
136
138 MMU mmu;
139
140private:
141 static double getCpuFreq(model_t model);
142
143private:
150 uint8_t cpuRead(uint_least16_t addr) { return mmu.cpuRead(addr); }
151
158 void cpuWrite(uint_least16_t addr, uint8_t data) { mmu.cpuWrite(addr, data); }
159
167 inline void interruptIRQ(bool state);
168
174 inline void interruptNMI() { cpu.triggerNMI (); }
175
179 inline void interruptRST() { cpu.triggerRST (); }
180
188 inline void setBA(bool state);
189
190 inline void lightpen(bool state);
191
192#ifdef PC64_TESTSUITE
193 testEnv *m_env;
194
195 void loadFile(const char *file)
196 {
197 m_env->load(file);
198 }
199#endif
200
201 void resetIoBank();
202
203public:
204 c64();
205 ~c64() {}
206
207#ifdef PC64_TESTSUITE
208 void setTestEnv(testEnv *env)
209 {
210 m_env = env;
211 }
212#endif
213
220 EventScheduler *getEventScheduler() { return &m_scheduler; }
221 const EventScheduler &getEventScheduler() const { return m_scheduler; }
223
224 void debug(bool enable, FILE *out) { cpu.debug(enable, out); }
225
226 void reset();
227 void resetCpu() { cpu.reset(); }
228
232 void setModel(model_t model);
233
234 void setRoms(const uint8_t* kernal, const uint8_t* basic, const uint8_t* character)
235 {
236 mmu.setRoms(kernal, basic, character);
237 }
238
244 double getMainCpuSpeed() const { return m_cpuFreq; }
245
251 void setBaseSid(c64sid *s);
252
262 bool addExtraSid(c64sid *s, int address);
263
267 void clearSids();
268
273 const char* cpuCredits () const { return cpu.credits(); }
274 const char* ciaCredits () const { return cia1.credits(); }
275 const char* vicCredits () const { return vic.credits(); }
277
278 sidmemory *getMemInterface() { return &mmu; }
279
280 uint_least16_t getCia1TimerA() const { return cia1.getTimerA(); }
281};
282
283void c64::interruptIRQ(bool state)
284{
285 if (state)
286 {
287 if (irqCount == 0)
288 cpu.triggerIRQ ();
289
290 irqCount ++;
291 }
292 else
293 {
294 irqCount --;
295 if (irqCount == 0)
296 cpu.clearIRQ ();
297 }
298}
299
300void c64::setBA(bool state)
301{
302 // only react to changes in state
303 if (state == oldBAState)
304 return;
305
306 oldBAState = state;
307
308 // Signal changes in BA to interested parties
309 cpu.setRDY (state);
310}
311
312void c64::lightpen(bool state)
313{
314 if (state)
315 vic.triggerLightpen();
316 else
317 vic.clearLightpen();
318}
319
320#endif // C64_H
Definition: ColorRAMBank.h:38
Definition: DisconnectedBusBank.h:37
Definition: EventScheduler.h:56
Definition: IOBank.h:37
Definition: mmu.h:44
void cpuWrite(uint_least16_t addr, uint8_t data)
Definition: mmu.h:131
uint8_t cpuRead(uint_least16_t addr) const
Definition: mmu.h:123
void reset()
Definition: mos6510.cpp:2167
void triggerIRQ()
Definition: mos6510.cpp:199
void triggerRST()
Definition: mos6510.cpp:171
void triggerNMI()
Definition: mos6510.cpp:185
void clearIRQ()
Definition: mos6510.cpp:213
void setRDY(bool newRDY)
Definition: mos6510.cpp:116
static const char * credits()
Definition: mos6526.h:266
void clearLightpen()
Definition: mos656x.cpp:675
void triggerLightpen()
Definition: mos656x.cpp:662
Definition: SidBank.h:36
Definition: c64.h:78
void setModel(model_t model)
Definition: c64.cpp:120
const char * cpuCredits() const
Definition: c64.h:273
bool addExtraSid(c64sid *s, int address)
Definition: c64.cpp:135
model_t
Definition: c64.h:81
@ NTSC_M
NTSC C64.
Definition: c64.h:83
@ OLD_NTSC_M
Old NTSC C64.
Definition: c64.h:84
@ PAL_B
PAL C64.
Definition: c64.h:82
@ PAL_N
C64 Drean.
Definition: c64.h:85
double getMainCpuSpeed() const
Definition: c64.h:244
void setBaseSid(c64sid *s)
Definition: c64.cpp:130
void clearSids()
Definition: c64.cpp:166
EventScheduler * getEventScheduler()
Definition: c64.h:220
Definition: c64cia.h:42
Definition: c64cia.h:97
Definition: c64cpu.h:32
Definition: c64env.h:38
Definition: c64sid.h:33
Definition: c64vic.h:44
Definition: sidmemory.h:31